VEGA AS2161 DHRUV64: India’s Indigenous RISC-V Dual-Core Microprocessor

The VEGA AS2161 is a high-performance 64-bit dual-core microprocessor developed under India’s Microprocessor Development Programme by C-DAC and sponsored by MeitY. Part of the VEGA processor family, it is based on the open-source RISC-V 64G (RV64IMAFD) architecture and provides an open, flexible, and high-performance software platform for embedded and high-throughput computing applications. DHRUV64 marks a major step toward a secure and self-reliant semiconductor ecosystem by strengthening India’s capability in advanced processor design and reducing long-term dependence on imported microprocessors.

India consumes nearly 20% of the world’s microprocessors, and DHRUV64 offers the country’s large engineering talent base a modern indigenous platform to grow the domestic semiconductor ecosystem. It builds on earlier Indian processor initiatives such as SHAKTI (IIT Madras) for strategic and defence use, AJIT (IIT Bombay) for industrial and robotics applications, VIKRAM (ISRO–SCL) for space missions, and THEJAS64 (C-DAC) for industrial automation. Together, these processors play a key role in establishing a strong and independent Indian processor ecosystem.

VEGA-AS2161

VEGA AS2161 Dual-core Microprocessor Specifications:

• Processor Architecture: RISC-V 64G (RV64IMAFD) instruction set
• CPU Cores: Dual-core, out-of-order execution
• Pipeline: 13–16 stage pipeline
• Branch Prediction: Advanced predictor with BTB, BHT, and RAS
• Architecture Type: Harvard architecture with separate instruction and data memories
• Privilege Levels: User, Supervisor, and Machine modes
• Memory Subsystem:
  • Full Memory Management Unit (MMU)
  • Page-based virtual memory
  • Configurable L1 and L2 caches
  • Linux OS support
• Floating-Point Support:
  • Single- and double-precision floating point
  • IEEE 754-2008 compliant floating-point unit
• Interconnect: High-performance multi-core interconnect
• External Interface: AXI4 / ACE-compliant interface
• Interrupts:
  • Platform Level Interrupt Controller (PLIC)
  • Up to 127 interrupt lines
  • Vectored interrupt support
  • Low interrupt latency
• Debug and Development:
  • Integrated debug controller
  • JTAG-compliant interface
  • Hardware and software breakpoint support
  • Eclipse debugging via GDB → OpenOCD → JTAG chain
• Target Applications: Media servers, single-board computers, storage, networking, and other high-throughput, multi-tasking systems

Key features of DHRUV64

The VEGA AS2161 supports Linux thanks to its built-in Memory Management Unit (MMU) and virtual memory capabilities, allowing it to run standard Linux applications and services. Software development is enabled through RISC-V GNU toolchains for C and C++ using the available SDK and Board Support Package (BSP) for system bring-up. Debugging is also straightforward, as the processor supports JTAG-based debugging using tools such as GDB and OpenOCD. In addition to Linux, the platform can also support embedded and real-time applications through lightweight RTOS options available for RISC-V systems.

DHRUV64 Driving India’s Indigenous Chip Roadmap

The VEGA AS2161 does not have a publicly listed price and is not sold as a standard off-the-shelf processor. It is primarily available through C-DAC and authorized partners for research, evaluation, and product development under the Government of India’s Microprocessor Development Program. Organizations or developers interested in the processor typically need to contact C-DAC directly to request pricing details, samples, or access to development platforms and reference designs.

Images used courtesy of vegaprocessors.in