Microchip introduces AVR SD family of microcontrollers

Microchip AVR SD Family Microcontrollers

Microchip has introduced the AVR SD family of microcontrollers, an economical and safety-enhanced 8-bit microcontroller that features a dual-core lockstep (DCLS) configuration. This setup allows two AVR cores to execute commands in parallel, effectively identifying any discrepancies. The dual AVR CPU cores operate at clock speeds of up to 20 MHz and boast single-cycle I/O access, a two-level interrupt controller, and a two-cycle hardware multiplier.

These microcontrollers are specifically targeted for applications that adhere to safety standards such as ISO 26262 (ASIL C) and IEC 61508 (SIL 2) within industrial, automotive, and medical environments. Typical use cases include safety-critical sensors, battery and flame detection systems in electric vehicles, and serving as a safety co-processor in larger systems to enhance ASIL/SIL compliance.

Specifications of AVR SD family microcontrollers

• CPU: Dual AVR CPU cores in lockstep, clocked up to 20 MHz
• Storage:
  • Flash: 32 KB (AVR32SD series) or 64 KB (AVR64SD series), all ECC-protected
  • SRAM: 4 KB or 8 KB
  • EEPROM: 256 bytes
  • Non-volatile memory: 512 B user row, and 256 B Boot Row
• Power supply: 2.7V to 5.5V
• Clock sources: internal oscillator (up to 20 MHz), PLL (up to 48 MHz), external crystals (32.768 kHz), external clock input
• Peripherals:
  • Event System (6 channels)
  • Timers: TCA (16-bit with three compare channels), up to four TCB (16-bit capture), TCD (12-bit for power), RTC (16-bit)
  • Communication: Up to 3x USARTs (RS‑485, LIN, SPI, IrDA), 2x SPI, 2x I2C (dual-mode
  • Analog: 2x 10-bit ADCs (~100 ksps), 1x 10-bit DAC, 3x analog comparators, 2x zero-cross detectors, multiple internal voltage references
  • Configurable Custom Logic (CCL): mini-FPGA with six programmable LUTs
  • I/O: Up to 40 GPIOs depending on package
• Packaging: Available in 20-, 28-, 32-, and 48-pin packages
• Operating temperature:
  • Industrial: –40 °C to +85 °C
  • Extended: –40 °C to +125 °C

Microchip AVR SD Family Microcontrollers System-in-Package

Safety features

The AVR SD family of microcontrollers is designed with a focus on functional safety, ensuring that systems can maintain safe operation even in the presence of faults, while also effectively mitigating those faults. Each device is constructed to minimize inherent design flaws and is capable of detecting and correcting errors induced by radiation, electrical noise, and transient glitches.

The microcontroller functions independently of the main CPU software, ensuring that the safety module remains active and cannot be bypassed. Key safety features of the hardware include an error controller, dual-core lockstep, memory protection, clock and power monitoring, dual watchdogs, and redundant peripherals. In summary, the combination of hardware redundancy, integrity checks, and autonomous recovery mechanisms allows compliance with ASIL C and SIL 2 safety standards.

In addition to functional safety, the AVR SD family integrates crucial cybersecurity features to guard against unauthorized firmware tampering and reprogramming. The core security measures involve disabling the program and debug (PDID) interface, along with the bootloader and cryptographic keys.

Microchip claims that the dual-core lockstep architecture delivers more than 99 percent fault coverage, reducing diagnostic code and CPU load significantly. This simplifies safety certification, lowers costs, shortens development cycles, and opens new doors for dependable embedded control.

Images courtesy of Microchip