DE1-SoC Development Board from Terasic

DE1-SoC Development Board from Terasic

by Joel Bodenmann:

The DE1-SoC board is populated with a six digit 7-segment display. All digits are connected to the FPGA. Therefore, in order to control the 7-segment display out of the Linux userspace code, one has to create a new component in QSys that is connected to the AMBA-AXI bus.
But first of all, please note that this is a blog post, not a comprehensive tutorial. The text below does not replace the official Altera documentation. Furthermore, the post does just show some code snippets. However, the fully working project can be found as a download at the very bottom.

DE1-SoC Development Board from Terasic – [Link]

Please follow and like us:
Pin Share
About mixos

Mike is the founder and editor of Electronics-Lab.com, an electronics engineering community/news and project sharing platform. He studied Electronics and Physics and enjoys everything that has moving electrons and fun. His interests lying on solar cells, microcontrollers and switchmode power supplies. Feel free to reach him for feedback, random tips or just to say hello :-)

view all posts by admin
Subscribe
Notify of
guest

0 Comments
Inline Feedbacks
View all comments
Get new posts by email:
Get new posts by email:

Join 97,426 other subscribers

Archives