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5 Jul 2014

Hydra-X is a development platform which is feature-rich, scalable, and easy to use.

The Hydra-X is based on the Power Application Controller (PAC)™ family of ICs. Hydra-X gives you the ability to execute your own code on a 32-bit ARM Cortex core, paralleled with analog resources such as multi-mode power manager (for AC-DC, DC-DC power management), configurable Analog Front-End (AFE), data converters (1 MHz 10-bit ADC, 2 precision DACs), 52 V, 72 V, 600 V gate drivers, and open drain drivers, to name a few.

With up to 14 PWM timing functions, you will find it hard to run out of timing resources. Fully configurable into PWM, input capture or output compare, these timers are expanded by a dead time generator block; extremely useful when driving external FETs in a half H-Bridge configuration and a dead time needs to be imposed in order to protect the design from shoot-through.

Hydra-X10 and Hydra-X20 by Active-Semi Inc. - [Link]

3 Jul 2014

IMG_20140630_184012

MSP430G2452 acting as a TMS0803 calculator chip. Emulates TI DataMath 2500II and Sinclair Scientific Calculators.

TMS0803/5 Emulating Calculator Build - [Link]

30 Jun 2014

article-2014june-microcontrollers-and-fiber-fig3

By Jon Gabay  @ digikey.com:

Copper-based connectivity has served us well for a long time and will continue to do so in applications where it is effective from a performance and cost perspective. For very-high speed and/or long-distance signaling, however, the material cost and physical signal limitations of using metallic conductors has driven eyes to other transport mechanisms.

Fiber optics is not new, and the telecom industry has pushed development and deployment of fiber-optic transceivers and links so that they now span the globe. Very few of our designs have had the need to traverse long distances at such high speeds. Even fewer of us have had deep enough pockets to set up vast high-speed networks. On the other hand, engineers now are finding that local requirements are pushing the limits of metallic interconnects.

Microcontrollers and Fiber Optics - [Link]

29 Jun 2014

Internal-32MHz-RC-oscillator-without-PLL-1

by Shawon Shahryiar @ embedded-lab.com:

Okay firstly the reason I wrote about the clock system instead of I/O ports or something else in this second post of the XMega series is simply because of the fact that without understanding clock configurations you won’t get what you want from your chip. Since XMega’s clock system is software-level configurable and complex at first, it makes itself the first priority module before anything else.

XMega Clock System - [Link]


28 Jun 2014

microchip

by elektor.com:

Anticipating the need for secure communications for the next level of device connectivity Microchip have integrated a complete hardware crypto engine into their PIC24F family of microcontrollers. Computers normally use software routines to carry out data encryption number crunching but for low power microcontrollers this method will generally use up too much of the processor’s resources and be too slow.

Microchip have integrated several security features into the PIC24F family of microcontrollers (identified by their ‘GB2’ suffix) to protect embedded data. The fully featured hardware crypto engine supports the AES, DES and 3DES standards to reduce software overheads, lower power consumption and enable faster throughput. A Random Number Generator is also implemented which can be used to create random keys for data encryption, decryption and authentication to provide a high level of security. For additional protection the One-Time-Programmable (OTP) key storage prevents the encryption key from being read or overwritten.

Microchip PICs with Integrated Crypto Engine - [Link]

27 Jun 2014

pyroelectro.com just started an online course, An Introduction To FPGA And CPLD, through uReddit.com.

This course is meant to create a pathway into learning about FPGA and CPLD electronics, for people who are scared of the code, tools and general trickery that usually comes with it. A hands-on approach is taken in this course through a combination of lecture and experimentation to teach you about the different features of both the development tools and languages used in the world of FPGA. Additionally, visuals are used throughout lectures like step-by-step schematic building and line-by-line code explanations so that everything gets explained.

An Introduction To FPGA And CPLD - [Link]

25 Jun 2014

IMG_0720Connor @ narkidae.com

I recently stumbled across an interesting fact in the datasheet for the ATMEGA32u4, the microcontroller I am using for my Einstepper Project. I was surprised to find that Atmel had included a temperature sensor in the core of the device that you can read using the internal ADC. As it turns out, there are many megaAVR devices contain an internal temperature sensor. According to Atmel’s product finder, these devices are:

ATMEGA Core Temperature Sensor - [Link]

23 Jun 2014

duodecimal

An ATTiny84 based computer designed and built by Jack Eisenmann.

DUO Decimal – a Single Board Computer - [Link]

19 Jun 2014

.business_card_v2_mlimpkin @ limpkin.fr writes:

At the end of this month, I’ll be leaving my current job. I therefore thought it’d be a nice occasion to build a new business card for my future interviews.

AVR business card v2 - [Link]

16 Jun 2014

20140602_212346_kitassembling_80_fxsc600x300

Neven Boyanov @ open-electronics.org writes:

The Tinusaur is a small board with a ATtiny85 micro-controller on it. The board has the minimum required components for the micro-controller to work properly. It also has few headers to connect external components and connector for ISP programmer. The board could work with any of those DIP-8 chips such as ATtiny25/ATtiny45/ATtiny85, ATtiny13 as well as their variations.

The goal of the Tinusaur project is to have a simple, cheap and quick-start platform for everyone interested in learning and creating things.

The Tinusaur Project - [Link]



 
 
 

 

 

 

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