First RISC-V-based SoC FPGA enters mass production with a smaller thermal footprint

First RISC-V-based SoC FPGA enters mass production with a smaller thermal footprint

1.066
Views
0 Comments

Microchip Technology has announced the first system-on-chip Field Programmable Gate Array (FPGA), MPFS250T, based on the open-standard RISC-V instruction set architecture to enter mass production. The news comes as the continued adoption of PolarFire SoC FPGA and exponential growth for the Mi-V ecosystem streamline RISC-V adoption across various industrial, IoT, and edge computing embedded devices.

Microchip previously announced the production qualification of MPFS025T, and the company has started taking orders for both the RISC-V SoC FPGAs. The volume production of Microchip MPFS250T extends the PolarFire SoC portfolio of multi-core RISC-V FPGAs to deliver a smaller thermal footprint and low power for embedded vision applications. Other applications include automotive, industrial automation, communications, defense, and IoT systems.

“We now have a large funnel of customers who have designed in the PolarFire SoC family with our suite of Mi-V tools and solutions,” said Shakeel Peera, vice president of marketing for Microchip’s FPGA business unit. “These customers have developed innovative products that bring best-in-class solutions to the market with superior thermal and power efficiency, as well as unprecedented compute capability in small form factors. We are now writing a new chapter in the history of RISC-V with the availability of production-qualified SoC PolarFire devices.”

The PolarFire SoC FPGAs provide configurable processing capabilities with real-time Linux-capable RISC-V-based microprocessor subsystems in the FPGA fabric. All developments are aligned to the Microchip Mi-V ecosystem roadmap and long-term commitment to public availability of the RISC-V SoC FPGAs. These devices leverage open-standard RISC-V ISA to enhance power efficiency, security, and reliability. Some new functionalities include deterministic Asymmetric Multiprocessing mode, which allows users to run Linux operating systems while running high-performance, real-time applications.

The PolarFire SoC FPGAs family delivers the combination of low-power consumption, thermal efficiency, and defense-grade security with a RISC-V CPU cluster and L2 memory subsystem. As part of the Microchip Mi-V ecosystem, several partners contribute to increasing RISC-V adoption through a comprehensive variety of IP, hardware, OS, middleware, debuggers, compilers, and design services.

“Microchip’s PolarFire SoC FPGA and Mi-V ecosystem provide an excellent platform to evaluate a Linux-capable multicore RISC-V-based SoC,” said Calista Redmond, CEO at RISC-V International. “The market now has a production-qualified RISC-V solution to procure and adopt in their designs. The FPGA fabric is an innovative platform that enables hardware acceleration for system design.”

At Mi-V Virtual Summit held on July 20-21, 2022, sixteen Mi-V partners will demonstrate their use cases using Microchip PolarFire SoC FPGA. For more information on the Microchip PolarFire SoC FPGA family, head to the official website.

About Abhishek Jadhav

Abhishek Jadhav is an engineering student, RISC-V ambassador and a freelance technology and science writer with bylines at Wevolver, Electromaker, Embedded Computing Design, Electronics-Lab, Hackster, and EdgeIR.

view all posts by abhishek
Subscribe
Notify of
guest

0 Comments
Inline Feedbacks
View all comments

Join 97,914 other subscribers

Archives