LUNA: Lets Your Capture And Analyze Traffic Between Hosts and USB devices

LUNA: Lets Your Capture And Analyze Traffic Between Hosts and USB devices


Lately, we have seen several interesting projects up for crowdfunding that you can support and get rewards for as well. One such project coming soon is the LUNA hacking device that is nothing but a PCB with some integrated circuits and complex circuitry. With this new device, you can build, test, monitor, and experiment with any USB device you can think of.

Can you imagine one hardware exhibiting three extremely useful capabilities for all kinds of developers? This will keep many of the designers clamoring over the ability to act as a high-speed USB protocol analyzer, a USB-hacking multi-tool, or a USB development platform. Looking at the specifications, you will notice that the hardware comes with Lattice Semiconductor LFE5U-12F ECP5 FPGA that is supported by the yosys+nextpnr open-source FPGA flow.

LUNA USB Protocol Analyzer

“Out-of-the-box, LUNA acts as a USB protocol analyzer capable of capturing and analyzing traffic between a host and any Low-, Full-, or High-Speed (“USB 2.0”) USB device. It works seamlessly with our open-source ViewSB software, which translates captured USB traffic into a human-readable format. ViewSB runs on Linux, macOS, Windows, and FreeBSD.”

For anyone who has been wishing to monitor and analyze the traffic of any USB 2.0 device. Along with the protocol analysis, the manufacturer doesn’t stop surprising us with its immense capabilities that allow you to create your high-speed USB device. This can be done using the FaceDancer library with which you don’t only get to create USB devices but also emulate them in high-level Python programming.

This is not the first time we have seen the LUNA team working in the USB space. Earlier, we have come across several educational materials that deal with hacking and working on USB devices. With onboard integrated circuits, you can easily configure the FPGA and run diagnostic tests like the built-in USB-to-serial communications bridge for FPGA debug I/O.

As mentioned earlier, the project is expected to hit crowdfunding soon. For more information on the product, head to the official program page where you can find information related to the hardware and create your own USB design.

Abhishek Jadhav is an engineering student, freelance tech writer, RISC-V Ambassador, and leader of the Open Hardware Developer Community.

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