Electronics Lab

Sipeed Longan Nano – RISC-V GD32VF103CBT6 Development Board

Sipeed Longan Nano is a development board based on GD32VF103CBT6 MCU with RISC-V 32-bit core of GigaDevice. It is convenient for students, engineers and geek enthusiasts to contact the new-generation RISC-V processor.



Sipeed Longan Nano is a development board based on GD32VF103CBT6 MCU with RISC-V 32-bit core of GigaDevice. It is convenient for students, engineers and geek enthusiasts to contact the new-generation RISC-V processor. Longan Nano sold by Seeed comes with a 0.96inch 160×80 IPS RGB LCD and an acrylic transparent case.

GD32VF103CBT6 is a Bumblebee core based on Nuclei System Technology. Support RV32IMAC instruction set and ECLIC fast interrupt function. Core power consumption is only 1/3 of that of traditional Cortex-M3.

Longan Nano development board, double-row pin layout design, needle spacing 700 mil, can be inserted directly into breadboard; on-board 8M passive crystal oscillator, 32.768 KHz RTC low-speed crystal oscillator, Mini TF slot, and use Type-C USB interface.

Longan Nano supports multiple download methods: USB DFU download, UART ISP download, JTAG download. In the USB DFU download mode, you only need a USB Type-C cable to download the program to the development board. At the same time, Longan Nano supports the standard JTAG interface, which can be debugged online using the in-store RISC-V debugger or any JTAG-enabled debugger such as J-Link.

Features

  • Chip built-in 128KB Flash, 32KB SRAM
  • 4 x general purpose 16-bit timer, 2 x basic 16-bit timer, 1 x advanced 16-bit timer
  • Watchdog, RTC, Systick
  • 3 x USART, 2 x I2C, 3 x SPI, 2 x I2S, 2 x CAN, 1 x USBFS (OTG)
  • 2 x ADC (10 channel), 2 x DAC

Introduction Video

Meanwhile, Sipeed has adapted the PlatformIO IDE for the Longan Nano development board, which can be visually developed on multiple platforms such as Windows/Linux:

https://github.com/sipeed/platform-gd32v

Sipeed’s Longan Nano is now available on Seeed store.

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Andrew

Regarding J-Link here is a handy guide explaining how to connect the wires for an external debug probe:
https://wiki.segger.com/SiPeed_Longan_Nano