The need for larger memory storage for smartphones will never stop, especially with the continuous development of larger and stronger applications. This need is always pushing semiconductor manufacturers to keep trying to fit as much bits as possible in smaller volumes and with lower costs.
To achieve this, memory chips are now growing in three dimensions instead of two. Recently, Toshiba has developed a new 96-layer BiCS 3D flash memory device with a storage capacity of 32 GB. The new device meets market demands and performance specifications for applications that include enterprise and consumer SSD, smartphones, tablets and memory cards.
This memory chip was built with three bits per cell, known as triple-level cell (TLC) technology. Stacking layers and manufacturing process increase the capacity of each chip with 40% per unit size. They also reduce the cost per bit, and increase the manufacturability of memory capacity per silicon wafer.
In order to add more layers to the chip, Toshiba is working on increasing the number of bits in every cell. In the near future, it will apply its new 96-layer process technology to larger capacity products, such as 64 GB. It will also develop chips with QLC (quadruple-level cell) technology.
By stacking 64 layers of QLCs, the engineers at Toshiba have created a 96-gigabyte device. Integrating 16 of them in one package will achieve a capacity of 1.5 TB, that corresponds to 12 trillion bits.
If you are interested, you can check these out at the 2017 Flash Memory Summit in Santa Clara, California from August 7-10.